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Possibilities and Limits of an automated AE-Channel-Verification ProcessHartmut Vallen, Jochen Vallen, Jens Forker, Gabriel CorneanuVallen-Systeme GmbH, Icking, Germany 1. Abstract The European standard CEN EN 13477-2 defines how the verification of the AE-channel for AE-burst measurement has to be performed. The manually controlled generation of the many different test signals required and reporting the results is rather a time consuming matter and calls for a combined hardware/software tool for the automation of this process. This paper describes a possible and realized solution for an automated AE-channel verification that has been designed for Vallen equipment, but is here expressly made public, for royalty free adaptation to other manufactures of burst-AE-systems. The verification process here described is for several months in use for post-configuration / pre- despatch verification at the Vallen factory, but can also be made available to each user of Vallen AE-channels of model ASIPP. It requires * an arbitrary waveform generator (Agilent 33120A/33220A), * software for the test signal stimulation (Vallen VeriStimulator) and a special printer cable to the "Externals" connector of AMSY4 or AMSY-5 * the normal AE-burst data acquisition program of the AE-system (Acqui32), and * software for the verification of the measurements and for report generation (Vallen VeriAnalyzer). The paper also discusses some problems and potential improvements of EN13477-2. 2. Introduction The scope of EN13477-2 says "This .. standard specifies methods for routine verification of the performance of an AE equipment comprising one or more sensing channels. It is intended for use by operators of the equipment. Verification of the measurement characteristics is recommended after purchase of equipment, modifications or use under extraordinary conditions." The need of routine verification is mentioned in the first sentence. The procedures described in EN13477-2 do not exclude other qualified methods. The automated verification method can use a larger variety of test signals than required by EN13477-2, and leads to a report that represents much more information about the accuracy of the measurements the AE channel performs. EN13477-2 describes methods for the verification of sensor sensitivity and noise, preamplifier performance and the signal conditioning and measurement system. This paper concentrates on the most expensive, because most time consuming part of this verification, the verification of the AE-signal processor (ASIPP). Since thousands of those AE 709 DGZfP-Proceedings BB 90-CD Lecture 75 EWGAE 2004 signal processors are in use world wide, and have to be verified in a routinely manner, the total costs spent on AE channel verification can be dramatically reduced by an automated verification process. 3. Hardware requirements Fig. 1 shows the hardware setup of the automated AE-channel verification. The PC controls the AE-system over a high-speed PCI-interface board (ASyC). For the verification, the PC also controls an arbitrary function generator of model 33120A (over RS232) or 33220A (USB/Ethernet) and over a parallel cable the data recording and a parametric counter inputs in the AE system. The stimulation control software controls over LPT1 parallel interface data recording and the parametric counter (PCTD) of the AE system. PCTD is used as a pointer into a table of test signal parameters. This table tells the analysis program for each PCTD value the corresponding "should be" values for the measured AE parameters. The only "special" hardware, beside of the function generator, is the cable from LPT1 connector of the PC to the "Externals" connector of the AMSY- 5. The schematic for that cable is shown in the corresponding documentation. 4. Channel verification software The automated verification process runs in two phases, a signal stimulation and data acquisition phase, followed by the data verification phase. Accordingly, the following software components are used: "VeriStimulator" programs a number of test patterns into the function generator and controls the generation of test patterns in a certain sequence. For the AE-Channel verification there are three semi-automatic steps: In Step 1, there are several variations of parameters (duration, amplitude at a certain working frequency in the middle of the bandwidth of the channel, plus a frequency response test.) Step 2 is optional and determines the frequency response of the optional 2nd filter module. Step 3 is to verify the proper working of the auto-calibration feature. The delay items offered in the menu (Fig. 2) are to adapt the software to older versions of Vallen AE-Systems. During the course of the signal stimulation phase, VeriStimulator directs the user to make changes in the connections, when needed. Personal Computer AE-System AMSY4/ AMSY-5 (Vallen-Systeme) Parametric Counter, digitally controlled (PCTD) Parametric Analog Inputs AE-Channel (ASIPP) #1 AE-Channel (ASIPP) #N USB/ Ethernet/ RS232 AE-Controller (PCI-Bus-Intfc) ASYC Parallel Interface (LPT1) Arbitrary Function Generator 33120A / 33220A (Agilent) Fig. 1: Hardware requirements for automated verification 710 DGZfP-Proceedings BB 90-CD Lecture 75 EWGAE 2004 This happens for example, when a channel is complete and the cable from the function generator shall be connected to the next channel. Fig. 2: VeriStimulator Setup "Acquisition32" is the normal data acquisition program used to acquire AE data and store them onto the hard disk of the PC. This program doesn't "know" whether it is used for normal data acquisition or for the automated verification process. It acts as usual. The identification of the verification patterns is stored in the parametric data that attend the AE burst data as usual. "VeriAnalyzer" is an offline program that reads AE data from file, identifies whether (or not) the data were stimulated by a valid release of "VeriStimulator" and analyses the "Should Be" values for each stimulated burst, and creates a report in Word format. This report contains a number of Diagrams that are described below. 5. Testsignals and result examples The automated verification process uses the following kinds of test signals which are stimulated by the arbitrary function generator under software control: 5.1 Single Dirac Pulses: This is a sharp pulse (Fig. 3) . Used to trigger a hit for passing administrative information (in the parametric counter PCTD) to the VeriAnalyzer software: * To indicate the data format (version id) of VeriStimulator, * To open or close a certain test series (e.g. the variation of a certain AE parameter). See set 633 in Fig. 6. PCTD=18 initiates a series of duration varied hits. PCTD=2 closes the series, PCTD=70 to 86 point into a "should be" table of durations for this verification step. Fig. 3 Dirac Pulse, 50ns width (at 50% amp.) 711 DGZfP-Proceedings BB 90-CD Lecture 75 EWGAE 2004 Fig. 4: ASIPP response (95-850kHz) to Dirac Pulse Input. Left in time domain, right the FFT 5.2 Rectangular-shaped burst: Used to vary Duration and to check the parameters Duration, Energy, Counts. Problems: Settling behaviour with overshoot at the beginning, and the ring-down behaviour at the end (see Fig. 5) influence the AE parameters Peak Amplitude, Risetime, Duration, Enery, Counts. Needs some intelligent correction. Fig. 5: ASIPP Response on a rectangular shaped sine wave burst . 5.3 Listing example for the duration variation test
Fig. 6: Listing of a test with duration variations (initiated by PCTD=18 and closed by PCTD=2) see signal 3.1 above. PCTD = parametric counter digitally controlled. Each PCTD value identifies a test signal and the corresponding "should be" results 5.4 Deviation diagram example for the duration variation test (Test #3) The verification report shows a number of "Deviation Diagrams", which contain graphical and numerical results. The horizontal position of each dot in a diagram represents a "should be" value, and the vertical position represents the deviation of the measured value from that "should be" value, in percent or dB as given in the legend. The meaning of each diagram (axis results) and some additional numerical values are shown in different parts of the legend. 712 DGZfP-Proceedings BB 90-CD Lecture 75 EWGAE 2004 Test 3: Duration variation: Frequency: 200KHz Test 3 passed Dur-deviation [%] vs. D [µs] max.: 0,9% (Offset 20.2 µs) allowed: 5,0% Eny-deviation [%] vs E [eu] max.: 0,1% (Offset -28,6 eu) allowed: 5.0% Cts deviation [%] vs. Cts max: 0.0% (% above1) Offset: 2 Cts allowed: 5.0% Fig. 7: Results in Fig. 6 shown in three "deviation" diagrams. The "Offsets" indcated in the legends of Fig. 7 were determined by the deviation of the first (shortest) measured signal from the "should be" values and applied to all 9 signals to correct the influence of the settling behavior and ring down effects. 5.5 Dirac Series: Such series are used to check duration discrimination and rearm timing (internal time parameters). Fig. 8: Response to a series of Dirac Pulses 5.6 Sine-square-shaped burst: This is a sine wave burst in an envelope of a sine-square shape (Fig. 9). This burst consist of 48 samples/sinewave and 41 sinewaves for the burst, this gives a sequence of 1968 samples for the complete test signal. These "sine-square-shaped test signals are used with (sampling) frequency variation at fixed amplitude to measure * Frequency response (no need for transient recorder), * Rise-time response; and with amplitude variation at fixed frequency to measure * Peak amplitude response (linearity) * Energy response (squared or non-squared). Fig. 9: Response to a sine-square-shaped burst. The impurities in the FFT (above 220kHz, right diagram) are produced by the test generator..
713 DGZfP-Proceedings BB 90-CD Lecture 75 EWGAE 2004 Test 4: Frequency Response Hi: 94,3- 811,4KHz A[dB] vs. f [kHz], HP: 095kHz, Hi-Flt-Pts:26, min: 5 Risetime deviation [%] vs R [µs] (Amax-1dB) max: 2,9% (% above: 2,0µs) R(shouldbe) = 19/f allowed: 10,0% Fig. 10 Results of frequency variation: Frequency response and rise time deviation
5.7 Data example: Frequency and rise time response Fig. 10 shows results of test #4, where test signals of different frequencies (sine-square- shaped) were used. The upper diagram shows dBAE values over the frequency. Above the diagram the software places the found 3db bandwidth limits. The lower diagram shows the rise time-deviation vs rise time (the should be values) of those signals that were measured with an amplitude above maximum - 1dB. Since the rise time is defined as the time from first threshold crossing to peak amplitude detection, and the sine-square shaped test signal begins very smoothly, noise may contribute to some uncertainty of the exact time of the 1st threshold crossing. As can be seen in Fig. 9, the peak time is also difficult to determine. Due to these inherent uncertainties, a deviation of 10% for the rise time is shown as the allowed tolerance. 5.8 Data example: Amplitude variation, amplitude and energy response Test 5: Amplitude variation ("shouldbe" corrected by 0,0 dB (allowed: -0,5 to 0,5 dB)) Test 5 passed Amplitude deviation [dB] vs. A[dBAE] max: 0,3 (dB above 3,0 µV) allowed: 1,0 Energy deviation [%] vs. E [eu] max: -1,3% (% above 1,0 eu) allowed: 5,0% Fig.11: Example for amplitude and energy deviation diagrams (Test #5 of verification). A correction of the "should be" values for balanced positive and negative deviations is shown above the diagram. These amplitude variation results are obtained using sine-square-shaped signals, because these do not show the settling behaviour we see with rectangle shaped signals. Here, one difficulty was the limited dynamic range of the function generator, that is only programmable in a 46dB range, but we need to check a dynamic range of 70dB (30..100dBAE). The increase of dynamic range for the function generator was solved by using a second sine-squared shape in a lower amplitude range. No external attenuator is needed and the full dynamic range can be tested without a change of the threshold setting. Another difficulty can be shown in the listing of the amplitude-varied signals below. Usually, PCTD is incremented by 2 between two test signals. Below there are two occurrences where PCTD stayed constant (140, 150). Two unexpected signals of low amplitude (about 30dB) were triggered by noise from the function generator. However, those noise signals can be identified by the verification analyzer software and do not disturb the verification result as long as the signal with expected amplitude for each PCTD value can be found in the data. 714 DGZfP-Proceedings BB 90-CD Lecture 75 EWGAE 2004 Data Example:
Amplitude variation in 2dB steps (Extract). Problem: False hits (A < 32dB) triggered by noise of function generator. Such noise is eliminated by VeriAnalyzer, because only the last hit of PCTD-ID counts. Fig. 13: Calibration Pulse Response Fig. 14: Continuous sine wave 5.9 Calibration Pulse Response: This test signal (Fig. 13 shows the response) is only used to check whether the calibration pass works. There is no accuracy check required, because the pulse signal is checked during the system verification run (performed by the same program but not described in detail here) 5.10 Continuous sine wave: This test signal (Fig. 14) is used to verify the accuracy of background noise measurement and the floating threshold behaviour. Due to the limited dynamic range of the function generator, 300µVRMS is the lowest level that can be verified. Test 6: RMSS and Floating Threshold (continuous signal) (corrected as with Test 5) Test 6 passed RMSS deviation [%] vs. RMSS [µV] max: 1,4% (% above 2,0 µV) allowed: 5,0% Floating Threshold deviation [dB] vs THR[dBAE] max: 0,3 (dB above 1,0 µV) TNR:4,2 allowed: 1,0 Fig. 15: Result of verification of background noise and floating threshold behaviour (Test #6) 715 DGZfP-Proceedings BB 90-CD Lecture 75 EWGAE 2004 Fig. 16: Example of an automatically generated AE channel verification report. The yellow fields are place holders and filled with text by the report generator. 716 DGZfP-Proceedings BB 90-CD Lecture 75 EWGAE 2004 6. Software sub-components contributing to the report generation 6.1 VeriConfig.doc is a Word (*.doc) file filled-in by the operator. This report identifies all relevant configuration information for the verification process, among them * the type, ID number and current address of the AE-system in which the AE-channels are installed for verification, * the identification and recalibration dates of the used test signal generators, and for each AE channel: * the ID number and current address of each AE-channel, * the channel's hardware and firmware revision, * the installed options (squarer, transient recorder, and bandwidth limits of the frequency filters). An extract of that report is shown in Fig. 17 Fig. 17: Extract of VeriConfig.doc filled in with details about the configuration of a system and the devices used for test signal generation. The hardware configuration of an AE-system is detected, analysed and stored onto the AE data file by the data acquisition program. VeriConfig.doc is read by "VeriAnalyzer" and compared with the hardware configuration found on the AE data file. Configuration mismatches are reported immediately. Some configuration items have influence on the "Should Be" values (e.g. the method of energy determination), some are only used for inclusion into the report. VeriConfig.doc has no influence on VeriStimulator. 6.2 ASIPPTemplate.doc is a Word (*.doc) template file used by "VeriAnalyzer" for report generation. It contains text marks and diagram place holders where VeriAnalyzer inserts results in numerical or graphical presentation. The letter head and company logo are part of the template and shall identify the organization that performs the verification. Fix. 18 shows an extract of the template used for the report in Fig. 16.
717 DGZfP-Proceedings BB 90-CD Lecture 75 EWGAE 2004 Fig. 18: Extract of ASIPPTemplate.doc. The yellow marked text-fields and the diagrams are just place holders (variables) to be replaced by VeriAnalyzer. See Fig. 16 7. Conclusions Since the only calibrated equipment needed for the channel verification process is a commercially available function generator from mass production, the costs of keeping that in a calibrated state are low and affordable for almost each owner of an AE system. The manually performed channel verification is a very time consuming process because of the many settings required for test signal variation. With automated verification as described above the number of different test signals is not a limiting point. Much more signal variants can be generated, verified and reported. For the reporting of verification results a combination of "deviation diagrams" and relevant legend information have been developed. A lot of verified measurements can be presented in very dense form that way. Side effects such as the settling behaviour of rectangle shaped bursts can be minimized by determining the deviation in duration, energy and counts of the shortest burst, and apply the so determined "offsets" to all measurements. The best suited signal shape of high frequency purity is the sine-square-shaped envelope. The envelope increases and decreases very smoothly. The determination of the rise time, defined as the time period from the first threshold crossing to the highest peak amplitude in the signal, bears some uncertainty, because the first threshold crossing as well as the peak amplitude lies in the time periods of the lowest changes in amplitude. Not shown in the paper are side benefits. For example, an incremental storage of all verification results of all channels may lead to statistical results about the scattering in parameter results, depending on e.g. the filter configuration or other variables. The verification process presented could easily be adopted to other manufactures of AE equipment. 718 |
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